The present invention relates to semiconductor memory devices and, more particularly, to a cell array of a semiconductor memory device and a method of driving the same, in which the leakage current can be reduced.
A flash memory device of a semiconductor memory device generally enables writing, reading and electrical erasure of information, and includes a plurality of memory cell arrays arranged in row and column directions.
The flash semiconductor memory cells are arranged in row and column directions to form a memory cell array. The flash semiconductor memory cell has a drain connected to a bit line extending in a column direction and a control gate connected to a word line extending in a row direction.
FIG. 1 is a circuit diagram of a cell array of a conventional semiconductor memory device.
Referring to FIG. 1, a memory cell array 10 includes a plurality of memory blocks 11; a block 0 to a block n (each including a plurality of memory cells, a source select transistor, and a drain select transistor) and a source voltage generator 12 for applying a source voltage to a common source line CSL that connects block 0 to block n of the memory block 11.
In the same sub of the memory cell array 10, block 0 to block n of the memory block 11 are connected to bit lines in parallel, and the source lines of block 0 to block n are connected to a common source line CSL.
In the cell array of the semiconductor memory device, a positive bias of about 1V is applied to a selected bit line and 0 V is applied to the common source line CSL during the read operation. Also, when a selected cell is erased, the current flows from the common source line CSL to the bit line.
In the cell array of the conventional semiconductor memory device constructed above, if the number of memory blocks connected to the same bit line is increased as the capacity of a semiconductor device gradually increases, the amount of the leakage current also increases. As the degree of integration of the device gradually increases, the on-cell current is decreased and the leakage current is increased. Thus, the sensing margin which discriminates between a programmed cell and an erased cell in a selected block abruptly decreases, causing an error in the device.